1. Technical Field
The present disclosure relates generally to a method and apparatus for controlling the operation of flash memory and, more particularly, to a technology that is capable of implementing an unclonable integrated circuit by controlling the various types of operations of flash memory.
2. Description of the Related Art
Even when the same type of electronic devices are fabricated using the same fabrication process, differences inevitably occur between the physical or electrical parameters of the devices. Devices that generate theoretically unpredictable results using the unpredictable differences in a fabrication process and have the intrinsic characteristics of the corresponding devices are referred to as Physically Unclonable Function (PUF) circuits.
Accordingly, a PUF circuit using NAND flash memory having the highest level integration of current semiconductor devices and a variety of characteristics are disclosed.
As a related technology, a technology of implementing a PUF circuit using the operation of the access circuits of SRAM and SRAM is disclosed in U.S. Patent Application Publication No. 2012-0230087 entitled “SRAM Circuits for Circuit Identification using a Digital Fingerprint.”
In the technology disclosed in U.S. Patent Application Publication No. 2012-0230087, the implementation of a SRAM cell as a PUF circuit is achieved using the phenomenon in which, when some of SRAM cells are turned off and on, a SRAM cell in a meta-stable state determines a resulting value in a logically stable state of HIGH/LOW. The access circuit of SRAM provides a selective profile of HIGH/LOW, and the SRAM-based PUF circuit is based on this selective profile.
Meanwhile, the technology disclosed in U.S. Patent Application Publication No. 2012-0230087 uses SRAM, which is different from a semiconductor adopted in the present invention in terms of the type of semiconductor.
As another related technology, a technology of implementing a PUF circuit using the physical characteristics of NAND flash memory is disclosed in the paper “Extracting Device Fingerprints from Flash Memory by Exploiting Physical Variations” by Pravin Prabhu, Ameen Akel, Laura M. Grupp, Wing-Kei S. Yu, G. Edward Suh, Edwin Kan, and Steven Swanson in the 4th international conference TRUST 2011.
The technology proposed by Pravin Prabhu et al. is configured to implement a PUF circuit using the correlation difference between the same word and a different block or chip element by means of the intrinsic characteristics of NAND flash, such as program disturbance and reading disturbance. However, when a PUF circuit is implemented using the program and reading disturbance characteristics, a problem occurs in the endurance characteristics of flash memory, or it takes a few or more hours to generate a significant correlation difference.
As still another related technology, a technology of implementing a commercial flash memory-based random number generator and a PUF circuit is disclosed in the paper “Flash Memory for Ubiquitous Hardware Security Functions: true random number generation and device fingerprints” by Yinglei Wang, Wing-kei Yu, Shuo Wu, Greg Malysa, G. Edward Suh, and Edwin C. Kan in the Security and Privacy (SP) of 2012 IEEE Symposium.
In this paper, the flash memory-based random number generator and the PUF circuit are implemented using the processing differences of flash memory unit cells, such as the differences in doping concentration, the thickness of the insulator of a floating gate, and the coupling ratio of a control gate. Furthermore, the flash memory-based random number generator and the PUF circuit are implemented using a method for stopping programming by issuing a reset command during incremental step pulse programming (ISPP), thereby establishing a meta-stable state.
As described above, the technology proposed by Yinglei Wang et al. is configured to cause a flash memory device performing a program operation using an ISPP method to enter a partial programming state by issuing a reset command during ISPP programming and to then implement a PUF circuit.
The ISPP method is a program method that enables the distribution of threshold voltages of flash memory to be reduced, thereby reducing the errors of flash memory. However, the ISPP method is not required for operation as a PUF circuit, and makes the performance of flash memory more complicated. Therefore, there is a need for the implementation of a flash memory-based PUF circuit that can be simply implemented without using an ISPP method and a reset function.